Wednesday, February 24, 2010

CS401 Paper


Assembly Language Paper – CS401

1. Division by zero is done by which interrupt.
2. Define Hardware Interrupt & I/O ports (5 marks)
3. Five BIOS video services used in text mode (3 marks)
4. DOS allocate memory for program execution and then de-allocate, explain memory management in DOS (10 marks)


1. BL contains 5 decimal then after right shift , BL will become

 3
v
 2.5
v
 5
v
 10
v
2. 8 * 16 font is stored in ________ bytes.

 3
v
 4
v
 8
v
 16
v
3. In DOS input buffer , number of characters actually read on return is stored in

 First byte
v
 Second byte
v
 Third byte
v
 Fourth
v byte
4. IRQ 0 has priority

 Low
v
 High
v
 Highest
v
 Medium
v
5. Thread registration code initialize PCB and add to linked list so that _____ will give it turn.
 Assembler
v
 Linker
v
 Scheduler
v
 Debugger
v
6. Traditional calling conventions are in ______ number
 1
v
 2
v
 3
v
 4
v
7. VESA VEB 2.0 is standard for
v High Resolution Mode
 Low
v Resolution Mode
 Very High Resolution Mode
v
 Medium
v Resolution Mode
8. To clear direction flag which instruction is used

 Cld
v
 Clrd
v
 Cl df
v
 Clr df
v
9. In STOSW instruction , When DI is cleared , SI is

v Incremented by 1
 Incremented by 2
v
v Decremented by 1
 Decremented by 2
v
10. Interrupt that is used in debugging with help of trap flag is

 INT 0
v
 INT 1
v
 INT 2
v
 INT 3
v
11. INT for arithmetic overflow is
 INT 1
v
 INT 2
v
 INT 3
v
 INT 4
v
12. IRQ referred as

 Eight Input signals
v
 One Input
v signal
 Eight Output signals
v
 One output signal
v


13. IRQ for keyboard is _________
14. IRQ for sound card is _____________
15. IRQ for floppy disk is _____________
16. IRQ with highest priority is
 Keyboard
v IRQ
 Timer IRQ
v
 Sound Card
v
 Floppy Disk
v


17. Pin for parallel port ground is
 10-18
v
 18-25
v
 25-32
v
 32-39
v
18. The physical address of Interrupt Descriptor Table (IDT) is stored in
 GDTR
v
 IDTR
v
 IVT
v
 IDTT
v
19. Execution of “RET 2” results in?
20. CX register is
 Count register
v
 Data
v register
 Index register
v
 Base register
v
21. OUT instruction uses _______ as source register.
22. IN DB-9 connector the Data Set ready pin is at
 5
v
 6
v
 7
v
 8
v
23. If two devices uses same IRQ then there is
v IRQ collision
 IRQ conflict
v
 IRQ drop
v
24. VESA organizes 16 bit color for every pixel in ratio
 5:5:5
v
 5:6:5
v
 6:5:6
v
 5:6:7
v

There was fill in blanks question with 10 marks. The choice was given at bottom.

25. Serial Port is also accessible via ______ ports, _________ is accessible via ports 3F8-3FF while _______ is accessible via 2F8 -2FF.
The first register at 3F8 is the _________ holding register if written to and the receiver ______ register if read from.
Other register of our interest include 3F9 whose ______ must be set to enable received data available interrupt and ________ must be set to enable transmitter holding register empty interrupt.
(Transmitter, COM 1 , I/O ports , COM2. bit 0 , Buffer , 3FA)


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